The present invention relates to a semiconductor integrated circuit device and a digital camera system and, particularly, to a technique effectively applied to an analog front-end signal processing of a CCD sensor and a CMOS sensor.
The CCD (Charge Coupled Device) sensor is widely used as an electronic imaging device in such a camera system as a video camera, a digital still camera, and a camera-equipped cell phone.
In an image-sensor signal-processing circuit provided in the digital video camera, for example, it is well known that signals taken from an imaging device such as a CCD sensor are sampled with respect to color levels by a correlated double sampling circuit etc.
This correlated double sampling circuit comprises, for example, two capacitors, a buffer circuit connected to one connections of the capacitors, an external capacitor connected to an input of the buffer circuit, a D/A (Digital/Analog) converter, and a complete differential amplifier.
Black level signals and pixel signals that are output signals from the CCD sensor are individually sampled to the two capacitors. The buffer circuit applies bias voltage for compensating various offsets.
The external capacitor retains bias voltages for compensating the offsets etc. The D/A converter outputs currents for charging and discharging the external capacitor. The complete differential amplifier outputs a difference between the black level signal and the pixel signal.
Additionally, there is also another correlated double sampling circuit, which comprises two sample/hold (S/H) circuits and a subtraction circuit for outputting a differential signal between the black level signal and the pixel signal individually sampled and held (e.g., see U.S. Pat. No. 5,736,886).
The sample/hold circuits individually sample and hold the CCD sensor output signals (black level signal and pixel signal). The subtraction circuit outputs the differential signal between the black level signal and the pixel signal individually sampled and held by the sample/hold circuits.